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    Deep neural network training with iPSO algorithm [IPSO algoritmasi ile derin sinir agi egitimi]
    (Institute of Electrical and Electronics Engineers Inc., 2018) Kosten M.M.; Barut M.; Acir N.
    Deep learning-based methods are frequently preferred in many areas in recent years. Another issue, which is as important as deep neural networks applications, is the training of deep neural networks. Although many techniques are proposed in the literature for the training of deep nets, most of these techniques use gradient descent based approaches. In this study, differently from the conventional gradient method, Improved Particle Swam Optimisation (IPSO) algorithm is used for the training of deep neural networks. LeNet-5 network is preferred as network structure and MNIST is utilized as data set. Depending on the number of particles, a performance of up to 96.29% was achieved. In the cases after 20 particles, the average performance was over 90%. © 2018 IEEE.
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    FPGA-based implementation of basic image processing applications as low-cost IP core [Temel Goruntu Isleme Uygulamalarmm Dusuk Maliyetli IP Cekirdek olarak FPGA Tabanli Gerceklenmesi]
    (Institute of Electrical and Electronics Engineers Inc., 2018) Altuncu M.A.; Kosten M.M.; Cavuslu M.A.; Sahin S.
    With technology, rapidly developing image sensors have begun to be used in many areas, from smart phones to unmanned vehicles. In particular, systems that have to process many images at the same time, such as unmanned vehicles, require a high amount of processing power and use expensive equipment. In this work, we describe FPGA based implementation of basic image processing applications that can work on low cost FPGA families for use in applications with high processing power. With the IP core, users can easily perform mirroring, inversion, negation, thresholding, brightness and contrast enhancement / reduction on the image. The IP core platform is designed to be independently. Synthesis results are given with reference to Xilinx's Spartan 7 FPGA. The results show that the developed IP core has a low hardware cost. © 2018 IEEE.