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Öğe A fully customizable hardware implementation for general purpose genetic algorithms(Elsevier Ltd, 2018) Peker M.In this work, a fully customizable general purpose genetic algorithm (GA) IP core has been proposed for field programmable gate arrays (FPGAs) using the pipeline and parallel architectures to speed up the GA process. The proposed system is implemented on FPGA and coded with very high speed integrated circuits (VHSIC) hardware description language (VHDL). The GA operators and the fitness functions are designed in a modular structure to enable the use of these modules asynchronously. The VHDL code is written with generic parameters to allow the customization of almost every parameter of the proposed FPGA IP Core depending on the problem. The proposed architecture synthesized and tested on Altera DE2-115 board with approximately 12% logic elements utilization. Results are obtained from standard optimization benchmark functions and the traveling salesman problem (TSP). In the hardware experiments, the proposed FPGA IP Core has been found the global optimum solutions for all of the standard benchmark functions and TSP. The clock cycle per generation value of the proposed FPGA IP Core has been decreased up to approximately 95% when compared with the existing implementations. For the TSP case, the proposed FPGA IP Core has reduced the run-time of the compared work approximately 75% and with optimized parameters, the reducement reached approximately 99%. For all test cases, it is concluded that the proposed core enhanced both the clock cycles needed to iterate one generation and the convergence speed of the existing GA implementations. © 2017 Elsevier B.V.Öğe Comparison of split complex-valued metaheuristic optimization algorithms for system identification problem [Sistem tanimlama problemi için bölünmüş kompleks-degerli sezgisel eniyileme algoritmalarinin karşilaştirilmasi](Institute of Electrical and Electronics Engineers Inc., 2018) Menguc E.C.; Peker M.; Cinar S.Since some of the real world problems include phase and amplitude information, complex modeling is more suitable. In this study, the well-used particle swarm optimization, simulated annealing and genetic algorithm are designed in a split form in order to process complex-valued signals. The performances of the algorithms are comparatively tested on two different system identification problems for different noise levels. Simulation results show that the split complex-valued metaheuristic algorithms produce results which are almost close to the weights of both unknown systems. © 2018 IEEE.Öğe Hardware emulation of HOG and AMDF based scale and rotation invariant robust shape detection(2012) Peker M.; Altun H.; Karakaya F.In this study, a hardware emulation of HOG and AMDF based scale and rotation invariant robust shape detection for Field Programmable Gate Arrays (FPGA) is described. For this purpose, a robust algorithm with light-computational load has been developed based on features extracted from histogram of oriented gradients (HOG). A normalization scheme is proposed to obtain scale-invariant robust features using HOG algorithm. Also a novel method for shape detection is proposed using Average Magnitude Difference Function (AMDF) which leads to a rotation-invariant and computationally light shape detection method. It is shown that the proposed method is robust against noise as well. Also it is indicated that the performance of the method is highly satisfactory for implementation on real-life industrial problems. © 2012 IEEE.Öğe Improving the cost-volume based local stereo matching algorithm [Maliyet-hacim tabanli yerel stereo eşleştirme algoritmasinin iyileştirilmesi](Institute of Electrical and Electronics Engineers Inc., 2018) Emlek A.; Peker M.; Yalçin M.K.Adaptive support weights (ASW) are one of the best methods for matching costs in local stereo matching algorithms. In the literature, the most common method is guided filter for calculating the support weight. Guided filter-based methods generally apply the right-left consistency check during the disparity refinement process. However, this process requires the two difference maps which are obtained by taking the reference of the right image and the left image. In this case, since two difference maps need to be obtained, the processing load is almost doubled. With the proposed algorithm, the difference map for the left image is obtained with the winner-take-all (WTA) method after the costs are calculated with the help of the guided filter. Later on, this difference map has been corrected with the help of the cross-based window approach, by this, both the performance was improved and the processing costs were reduced, this resulted in a nearly twofold reducement in terms of the processing time. The results obtained were tested in the Middlebury dataset. © 2018 IEEE.